1. Field of the Invention
The present invention relates to a signal buffer circuit, a sensor control board including the signal buffer circuit, an image scanner including the signal buffer circuit and sensor control board, and an image forming apparatus including the image scanner.
2. Description of the Background Art
Scanners receive light reflected from a document image face (hereinafter, document), and then the light is photo-electrically converted to electrical signals using an image sensor such as a charge coupled device (CCD) installed in a sensor control board, by which an image of the document is read, or scanned. In the sensor control board, signals output from the CCD are buffered by a signal buffer circuit employing an emitter follower circuit, and then the signals are input to an analog processing circuit such as an analog-front-end (AFE) via alternating current (AC) coupling. At this time, during transitional operations, such as power source ON/OFF, or clock input or shutdown, over-output or under-output from the CCD or signal disruption occurs, leading to excess voltage or excess current at the AFE.
In view of such problem, conventional methods use an emitter follower circuit disposed before the AFE to block signals or limit the signal amplification so as to prevent the occurrence of over-voltage or over-current at the AFE. For example, JP-2007-214688-A discloses a method to suppress over-voltage to the AFE, in which the power source of the emitter follower circuit is delayed to shut off a transistor, as a result of which signals output from the CCD are not transmitted to the AFE and the over-voltage at the AFE is prevented. Although successful at preventing over-voltage or over-current at the AFE, such conventional methods using the emitter follower circuit to shut down or limit signals have a drawback in that over-voltage (or reverse bias voltage) occurs at the emitter follower circuit itself that shuts down or limits the signals.